Hi Community ,
As present i am using Spartan-6 FPGA in the design , and for version control using Bit Bucket. In design have Processor and FPGA interfaced on parallel bus .
The query is that - i want to use logic to store the commit ID in FPGA, so that the commit version used can be read by processor on demand, which makes the user to easily know the loaded BIT file in the FPGA and the current version of RTL code / BIT file used in it.
So if someone has used in there RTL the commit ID tracking in FPGA can help for same , so that version of the RTL or BIT file can be tracked easily or at user end .
Hello all! It has been 20 years since the agile manifesto was introduced, and closer to 40 years since software development began moving away from a waterfall-type approach. While many teams have ...
Connect with like-minded Atlassian users at free events near you!Find an event
Connect with like-minded Atlassian users at free events near you!
Unfortunately there are no Community Events near you at the moment.Host an event
You're one step closer to meeting fellow Atlassian users at your local event. Learn more about Community Events